diff options
author | Thomas Russell Murphy <thomas.russell.murphy@case.edu> | 2014-01-04 22:45:52 -0500 |
---|---|---|
committer | tmk <nobody@nowhere> | 2014-01-07 11:03:18 +0900 |
commit | 3ee5f565ae98cc68b6dff24225b6f8f069f6e20d (patch) | |
tree | f6cbb6bf66c9189f44cd9b7b20c93f6888c05b4f /converter/pc98_usb/README | |
parent | 6e9260cc176a77702b22381d01c59f0deafcb996 (diff) | |
download | qmk_firmware-3ee5f565ae98cc68b6dff24225b6f8f069f6e20d.tar.gz qmk_firmware-3ee5f565ae98cc68b6dff24225b6f8f069f6e20d.zip |
Spellchecking converter README files.
Diffstat (limited to 'converter/pc98_usb/README')
-rw-r--r-- | converter/pc98_usb/README | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/converter/pc98_usb/README b/converter/pc98_usb/README index 23f1b614e6..a010dee2ee 100644 --- a/converter/pc98_usb/README +++ b/converter/pc98_usb/README @@ -16,7 +16,7 @@ Connector (receptacle) -Wiring: You can change this with ediging config.h. +Wiring: You can change this with editing config.h. Pin mini DIN MCU ---------------------------------- @@ -34,7 +34,7 @@ Wiring: You can change this with ediging config.h. Protocol -------- -Singnal: Asynchronous, Positive logic, 19200baud, Least bit first +Signal: Asynchronous, Positive logic, 19200baud, Least bit first Frame format: 1-Start bit(Lo), 8-Data bits, Odd-Parity, 1-Stop bit This converter uses software method for testing purpose. AVR UART engine will work better. |