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| author | tmk <hasu@tmk-kbd.com> | 2015-05-14 15:38:15 +0900 |
|---|---|---|
| committer | tmk <hasu@tmk-kbd.com> | 2015-05-19 00:39:43 +0900 |
| commit | 9a2282157fbdf57ef0a50d4fea7da72505906588 (patch) | |
| tree | 38bceaf7a84dcdb9678155e845520b4f5494c559 /converter | |
| parent | 6014d1014e96a7b484699d4dd8c04292c0233b0e (diff) | |
| download | qmk_firmware-9a2282157fbdf57ef0a50d4fea7da72505906588.tar.gz qmk_firmware-9a2282157fbdf57ef0a50d4fea7da72505906588.zip | |
ibm4704_usb: Fix interrupt of clock(rising edge)
Diffstat (limited to 'converter')
| -rw-r--r-- | converter/ibm4704_usb/config.h | 4 | ||||
| -rw-r--r-- | converter/ibm4704_usb/ibm4704.txt | 6 |
2 files changed, 5 insertions, 5 deletions
diff --git a/converter/ibm4704_usb/config.h b/converter/ibm4704_usb/config.h index 4f267b3b7a..d9d8d39bc0 100644 --- a/converter/ibm4704_usb/config.h +++ b/converter/ibm4704_usb/config.h @@ -51,8 +51,8 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. #define IBM4704_DATA_DDR DDRD #define IBM4704_DATA_BIT 0 -/* Pin interrupt on rising edge */ -#define IBM4704_INT_INIT() do { EICRA |= ((1<<ISC11)|(0<<ISC10)); } while (0) +/* Pin interrupt on rising edge of clock */ +#define IBM4704_INT_INIT() do { EICRA |= ((1<<ISC11)|(1<<ISC10)); } while (0) #define IBM4704_INT_ON() do { EIMSK |= (1<<INT1); } while (0) #define IBM4704_INT_OFF() do { EIMSK &= ~(1<<INT1); } while (0) #define IBM4704_INT_VECT INT1_vect diff --git a/converter/ibm4704_usb/ibm4704.txt b/converter/ibm4704_usb/ibm4704.txt index 9c4895d922..50d8c98b08 100644 --- a/converter/ibm4704_usb/ibm4704.txt +++ b/converter/ibm4704_usb/ibm4704.txt @@ -57,15 +57,15 @@ Keyboard to Host ---------------- Data bits are LSB first and Pairty is odd. Clock has around 60us high and 30us low part. - ____ __ __ __ __ __ __ __ __ __ ________ - Clock \____/ \_/ \_/ \_/ \_/ \_/ \_/ \_/ \_/ \_/ + ____ __ __ __ __ __ __ __ __ __ _______ + Clock \_____/ \_/ \_/ \_/ \_/ \_/ \_/ \_/ \_/ \_/ ____ ____ ____ ____ ____ ____ ____ ____ ____ ____ Data ____/ X____X____X____X____X____X____X____X____X____X________ Start 0 1 2 3 4 5 6 7 P Stop Start bit: can be long as 300-350us. Inhibit: Pull Data line down to inhibit keyboard to send. -Timing: Host reads bit while Clock is hi. +Timing: Host reads bit while Clock is hi.(rising edge) Stop bit: Keyboard pulls down Data line to lo after 9th clock. |