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authoryulei <yuleiz@gmail.com>2019-12-13 09:20:04 +0800
committerDrashna Jaelre <drashna@live.com>2019-12-12 17:20:04 -0800
commita037cedfdc0bdb5737586ab4b4ef7086e53029b7 (patch)
treef80062c92eb354ea4b4281af9d95a06b23ad37f5 /drivers
parentdf78593b1ba800223c049f3f61df6ad4bf4abe7c (diff)
downloadqmk_firmware-a037cedfdc0bdb5737586ab4b4ef7086e53029b7.tar.gz
qmk_firmware-a037cedfdc0bdb5737586ab4b4ef7086e53029b7.zip
fixed I2C driver support for stm32f4 (#7526)
* correct i2c driver for stm32f4 * update pin mode definitions * update macro definition
Diffstat (limited to 'drivers')
-rw-r--r--drivers/arm/i2c_master.c2
-rw-r--r--drivers/arm/i2c_master.h24
2 files changed, 16 insertions, 10 deletions
diff --git a/drivers/arm/i2c_master.c b/drivers/arm/i2c_master.c
index 2a43ba2393..b9eff0ad2e 100644
--- a/drivers/arm/i2c_master.c
+++ b/drivers/arm/i2c_master.c
@@ -62,7 +62,7 @@ __attribute__((weak)) void i2c_init(void) {
palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_INPUT);
chThdSleepMilliseconds(10);
-#ifdef USE_I2CV1
+#if defined(USE_GPIOV1)
palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_STM32_ALTERNATE_OPENDRAIN);
palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_STM32_ALTERNATE_OPENDRAIN);
#else
diff --git a/drivers/arm/i2c_master.h b/drivers/arm/i2c_master.h
index efe3909a66..31cbfb9774 100644
--- a/drivers/arm/i2c_master.h
+++ b/drivers/arm/i2c_master.h
@@ -27,7 +27,7 @@
#include "ch.h"
#include <hal.h>
-#if defined(STM32F1XX) || defined(STM32F1xx) || defined(STM32F2xx) || defined(STM32F4xx) || defined(STM32L0xx) || defined(STM32L1xx)
+#if defined(STM32F1XX) || defined(STM32F1xx) || defined(STM32F2xx) || defined(STM32F4xx) || defined(STM32F4XX) || defined(STM32L0xx) || defined(STM32L1xx)
# define USE_I2CV1
#endif
@@ -51,6 +51,20 @@
# define I2C1_SDA 7
#endif
+#if defined(STM32F1XX) || defined(STM32F1xx)
+# define USE_GPIOV1
+#endif
+
+#ifndef USE_GPIOV1
+// The default PAL alternate modes are used to signal that the pins are used for I2C
+# ifndef I2C1_SCL_PAL_MODE
+# define I2C1_SCL_PAL_MODE 4
+# endif
+# ifndef I2C1_SDA_PAL_MODE
+# define I2C1_SDA_PAL_MODE 4
+# endif
+#endif
+
#ifdef USE_I2CV1
# ifndef I2C1_OPMODE
# define I2C1_OPMODE OPMODE_I2C
@@ -62,14 +76,6 @@
# define I2C1_DUTY_CYCLE STD_DUTY_CYCLE /* FAST_DUTY_CYCLE_2 */
# endif
#else
-// The default PAL alternate modes are used to signal that the pins are used for I2C
-# ifndef I2C1_SCL_PAL_MODE
-# define I2C1_SCL_PAL_MODE 4
-# endif
-# ifndef I2C1_SDA_PAL_MODE
-# define I2C1_SDA_PAL_MODE 4
-# endif
-
// The default timing values below configures the I2C clock to 400khz assuming a 72Mhz clock
// For more info : https://www.st.com/en/embedded-software/stsw-stm32126.html
# ifndef I2C1_TIMINGR_PRESC