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author | QMK Bot <hello@qmk.fm> | 2022-05-17 12:01:31 +0000 |
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committer | QMK Bot <hello@qmk.fm> | 2022-05-17 12:01:31 +0000 |
commit | cc8c539d002aa95e99d374c987701f396b2618f4 (patch) | |
tree | 723918ea6c89b1c5daba9b2c23a522265f283929 /keyboards/xelus/pachi | |
parent | 7541e75c3e257fce7c7b507fc958fa84e19fa265 (diff) | |
parent | 656090335066eed90a9b76e113fb93ee3bc8c089 (diff) | |
download | qmk_firmware-cc8c539d002aa95e99d374c987701f396b2618f4.tar.gz qmk_firmware-cc8c539d002aa95e99d374c987701f396b2618f4.zip |
Merge remote-tracking branch 'origin/master' into develop
Diffstat (limited to 'keyboards/xelus/pachi')
-rw-r--r-- | keyboards/xelus/pachi/rgb/rev1/config.h | 9 | ||||
-rw-r--r-- | keyboards/xelus/pachi/rgb/rev2/config.h | 4 |
2 files changed, 8 insertions, 5 deletions
diff --git a/keyboards/xelus/pachi/rgb/rev1/config.h b/keyboards/xelus/pachi/rgb/rev1/config.h index e6cf1756bd..2711b5c7a8 100644 --- a/keyboards/xelus/pachi/rgb/rev1/config.h +++ b/keyboards/xelus/pachi/rgb/rev1/config.h @@ -21,7 +21,7 @@ #define PRODUCT_ID 0x5052 // "PR" #define DEVICE_VER 0x0001 #define MANUFACTURER Xelus -#define PRODUCT Xelus Pachi RGB Rev 1 +#define PRODUCT Xelus Pachi RGB Rev1 /* key matrix size */ #define MATRIX_ROWS 6 @@ -45,8 +45,8 @@ #define LOCKING_RESYNC_ENABLE // I2C setup -#define I2C1_SCL 8 -#define I2C1_SDA 9 +#define I2C1_SCL_PIN B8 +#define I2C1_SDA_PIN B9 #define I2C1_SCL_PAL_MODE 4 #define I2C1_SDA_PAL_MODE 4 #define I2C1_TIMINGR_PRESC 0U @@ -58,6 +58,9 @@ // I2C EEPROM #define EEPROM_I2C_24LC64 +// More EEPROM for layers +#define DYNAMIC_KEYMAP_EEPROM_MAX_ADDR 8191 + // RGB Matrix defines #define DRIVER_ADDR_1 0b0110000 diff --git a/keyboards/xelus/pachi/rgb/rev2/config.h b/keyboards/xelus/pachi/rgb/rev2/config.h index a9240da6bb..35a4cf238f 100644 --- a/keyboards/xelus/pachi/rgb/rev2/config.h +++ b/keyboards/xelus/pachi/rgb/rev2/config.h @@ -45,8 +45,8 @@ #define LOCKING_RESYNC_ENABLE // I2C setup -#define I2C1_SCL 6 -#define I2C1_SDA 7 +#define I2C1_SCL_PIN B6 +#define I2C1_SDA_PIN B7 #define I2C1_SCL_PAL_MODE 4 #define I2C1_SDA_PAL_MODE 4 #define I2C1_TIMINGR_PRESC 0U |