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| author | InigoGutierrez <inigogf.95@gmail.com> | 2022-09-25 16:02:54 +0200 |
|---|---|---|
| committer | InigoGutierrez <inigogf.95@gmail.com> | 2022-09-25 16:02:54 +0200 |
| commit | 6afdd9d74da250e47ac64d6690bd19d037045e99 (patch) | |
| tree | 661f6cfb244c02bcd1fbfe8fb9b2bd9242a91394 /keyboards/xelus/rs60/rev2_0/mcuconf.h | |
| parent | 93a55e61b59d20f7cd842cce02e5b18a63a23612 (diff) | |
| parent | 1bdf4cdc22ae57d111efb2f7d71e405e5c7b3f11 (diff) | |
| download | qmk_firmware-6afdd9d74da250e47ac64d6690bd19d037045e99.tar.gz qmk_firmware-6afdd9d74da250e47ac64d6690bd19d037045e99.zip | |
Merge branch 'master' into taamas
Diffstat (limited to 'keyboards/xelus/rs60/rev2_0/mcuconf.h')
| -rw-r--r-- | keyboards/xelus/rs60/rev2_0/mcuconf.h | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/keyboards/xelus/rs60/rev2_0/mcuconf.h b/keyboards/xelus/rs60/rev2_0/mcuconf.h new file mode 100644 index 0000000000..2ef15d0720 --- /dev/null +++ b/keyboards/xelus/rs60/rev2_0/mcuconf.h @@ -0,0 +1,42 @@ +/* Copyright 2022 QMK + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +/* + * This file was auto-generated by: + * `qmk chibios-confmigrate -i keyboards/xelus/kangaroo/mcuconf.h -r platforms/chibios/GENERIC_STM32_F072XB/configs/mcuconf.h` + */ + +#pragma once + +#include_next <mcuconf.h> + +#undef STM32_PLLM_VALUE +#undef STM32_PLLN_VALUE +#undef STM32_PLLP_VALUE +#undef STM32_PLLQ_VALUE +#undef STM32_PPRE1 +#undef STM32_PPRE2 + +// 64MHz core +#define STM32_PLLM_VALUE 8 +#define STM32_PLLN_VALUE 168 +#define STM32_PLLP_VALUE 4 +#define STM32_PLLQ_VALUE 7 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE1_DIV1 + +#undef STM32_I2C_USE_I2C1 +#define STM32_I2C_USE_I2C1 TRUE |