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| author | Nick Brassel <nick@tzarc.org> | 2021-11-03 08:26:40 +1100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2021-11-03 08:26:40 +1100 |
| commit | 5da04fb45b0d5cddc6f49f88ea9c6a4037ef82ce (patch) | |
| tree | 6fb7eafbbbef1278200421290659a13d208d7c31 /platforms/chibios/boards/GENERIC_STM32_G474XE | |
| parent | 387edab52b1c1ab7585c4c1a11d997a6a90a505c (diff) | |
| download | qmk_firmware-5da04fb45b0d5cddc6f49f88ea9c6a4037ef82ce.tar.gz qmk_firmware-5da04fb45b0d5cddc6f49f88ea9c6a4037ef82ce.zip | |
Update to ChibiOS 20.3.4, support builds against trunk (#14208)
* Add support for building against ChibiOS svn/trunk.
* Swap to 21.6.x
* Update to latest branch revision as released version is broken.
* Updated configs.
* Conf updates.
* Updated ChibiOS
* Convert STM32L422 to actual L422 ChibiOS platform.
* Downgrade to 20.3.4 as ChibiOS 21.6.x is being aborted.
* Rollback L422-based boards.
Diffstat (limited to 'platforms/chibios/boards/GENERIC_STM32_G474XE')
| -rw-r--r-- | platforms/chibios/boards/GENERIC_STM32_G474XE/configs/mcuconf.h | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/platforms/chibios/boards/GENERIC_STM32_G474XE/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_G474XE/configs/mcuconf.h index 117e920e3b..5710e2cb45 100644 --- a/platforms/chibios/boards/GENERIC_STM32_G474XE/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_STM32_G474XE/configs/mcuconf.h @@ -42,9 +42,24 @@ */ #define STM32_NO_INIT FALSE #define STM32_VOS STM32_VOS_RANGE1 +#define STM32_PWR_BOOST TRUE #define STM32_PWR_CR2 (PWR_CR2_PLS_LEV0) #define STM32_PWR_CR3 (PWR_CR3_EIWF) #define STM32_PWR_CR4 (0U) +#define STM32_PWR_PUCRA (0U) +#define STM32_PWR_PDCRA (0U) +#define STM32_PWR_PUCRB (0U) +#define STM32_PWR_PDCRB (0U) +#define STM32_PWR_PUCRC (0U) +#define STM32_PWR_PDCRC (0U) +#define STM32_PWR_PUCRD (0U) +#define STM32_PWR_PDCRD (0U) +#define STM32_PWR_PUCRE (0U) +#define STM32_PWR_PDCRE (0U) +#define STM32_PWR_PUCRF (0U) +#define STM32_PWR_PDCRF (0U) +#define STM32_PWR_PUCRG (0U) +#define STM32_PWR_PDCRG (0U) #define STM32_HSI16_ENABLED TRUE #define STM32_HSI48_ENABLED TRUE #define STM32_HSE_ENABLED FALSE |