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authorNick Brassel <nick@tzarc.org>2022-06-30 07:42:23 +1000
committerGitHub <noreply@github.com>2022-06-30 07:42:23 +1000
commit34e244cecf62afb30ee5a4362867f24b03675691 (patch)
tree5e349edd1e2749a2f158011f6cbf3fed3c054203 /platforms
parent1204cbb7ea53ff1e4e2aeb45e2cd0f371d30dcec (diff)
downloadqmk_firmware-34e244cecf62afb30ee5a4362867f24b03675691.tar.gz
qmk_firmware-34e244cecf62afb30ee5a4362867f24b03675691.zip
Wear-leveling EEPROM drivers: `embedded_flash`, `spi_flash`, `legacy` (#17376)
Diffstat (limited to 'platforms')
-rw-r--r--platforms/chibios/drivers/wear_leveling/wear_leveling_efl.c140
-rw-r--r--platforms/chibios/drivers/wear_leveling/wear_leveling_efl_config.h50
-rw-r--r--platforms/chibios/drivers/wear_leveling/wear_leveling_legacy.c59
-rw-r--r--platforms/chibios/drivers/wear_leveling/wear_leveling_legacy_config.h67
-rw-r--r--platforms/chibios/platform.mk5
-rw-r--r--platforms/eeprom.h2
6 files changed, 323 insertions, 0 deletions
diff --git a/platforms/chibios/drivers/wear_leveling/wear_leveling_efl.c b/platforms/chibios/drivers/wear_leveling/wear_leveling_efl.c
new file mode 100644
index 0000000000..4b5639ee4a
--- /dev/null
+++ b/platforms/chibios/drivers/wear_leveling/wear_leveling_efl.c
@@ -0,0 +1,140 @@
+// Copyright 2022 Nick Brassel (@tzarc)
+// SPDX-License-Identifier: GPL-2.0-or-later
+#include <stdbool.h>
+#include <hal.h>
+#include "timer.h"
+#include "wear_leveling.h"
+#include "wear_leveling_internal.h"
+
+static flash_offset_t base_offset = UINT32_MAX;
+
+#if defined(WEAR_LEVELING_EFL_FIRST_SECTOR)
+static flash_sector_t first_sector = WEAR_LEVELING_EFL_FIRST_SECTOR;
+#else // defined(WEAR_LEVELING_EFL_FIRST_SECTOR)
+static flash_sector_t first_sector = UINT16_MAX;
+#endif // defined(WEAR_LEVELING_EFL_FIRST_SECTOR)
+
+static flash_sector_t sector_count = UINT16_MAX;
+static BaseFlash * flash;
+
+#ifndef WEAR_LEVELING_EFL_FIRST_SECTOR
+// "Automatic" detection of the flash size -- ideally ChibiOS would have this already, but alas, it doesn't.
+static inline uint32_t detect_flash_size(void) {
+# if defined(WEAR_LEVELING_EFL_FLASH_SIZE)
+ return WEAR_LEVELING_EFL_FLASH_SIZE;
+# elif defined(FLASH_BANK_SIZE)
+ return FLASH_BANK_SIZE;
+# elif defined(FLASH_SIZE)
+ return FLASH_SIZE;
+# elif defined(FLASHSIZE_BASE)
+# if defined(QMK_MCU_SERIES_STM32F0XX) || defined(QMK_MCU_SERIES_STM32F1XX) || defined(QMK_MCU_SERIES_STM32F3XX) || defined(QMK_MCU_SERIES_STM32F4XX) || defined(QMK_MCU_SERIES_STM32G4XX) || defined(QMK_MCU_SERIES_STM32L0XX) || defined(QMK_MCU_SERIES_STM32L4XX) || defined(QMK_MCU_SERIES_GD32VF103)
+ return ((*(uint32_t *)FLASHSIZE_BASE) & 0xFFFFU) << 10U; // this register has the flash size in kB, so we convert it to bytes
+# elif defined(QMK_MCU_SERIES_STM32L1XX)
+# error This MCU family has an uncommon flash size register definition and has not been implemented. Perhaps try using the true EEPROM on the MCU instead?
+# endif
+# else
+# error Unknown flash size definition.
+ return 0;
+# endif
+}
+#endif // WEAR_LEVELING_EFL_FIRST_SECTOR
+
+bool backing_store_init(void) {
+ bs_dprintf("Init\n");
+ flash = (BaseFlash *)&EFLD1;
+
+ const flash_descriptor_t *desc = flashGetDescriptor(flash);
+ uint32_t counter = 0;
+
+#if defined(WEAR_LEVELING_EFL_FIRST_SECTOR)
+
+ // Work out how many sectors we want to use, working forwards from the first sector specified
+ for (flash_sector_t i = 0; i < desc->sectors_count - first_sector; ++i) {
+ counter += flashGetSectorSize(flash, first_sector + i);
+ if (counter >= (WEAR_LEVELING_BACKING_SIZE)) {
+ sector_count = i + 1;
+ base_offset = flashGetSectorOffset(flash, first_sector);
+ break;
+ }
+ }
+ if (sector_count == UINT16_MAX || base_offset >= flash_size) {
+ // We didn't get the required number of sectors. Can't do anything here. Fault.
+ chSysHalt("Invalid sector count intended to be used with wear_leveling");
+ }
+
+#else // defined(WEAR_LEVELING_EFL_FIRST_SECTOR)
+
+ // Work out how many sectors we want to use, working backwards from the end of the flash
+ uint32_t flash_size = detect_flash_size();
+ flash_sector_t last_sector = desc->sectors_count;
+ for (flash_sector_t i = 0; i < desc->sectors_count; ++i) {
+ first_sector = desc->sectors_count - i - 1;
+ if (flashGetSectorOffset(flash, first_sector) >= flash_size) {
+ last_sector = first_sector;
+ continue;
+ }
+ counter += flashGetSectorSize(flash, first_sector);
+ if (counter >= (WEAR_LEVELING_BACKING_SIZE)) {
+ sector_count = last_sector - first_sector;
+ base_offset = flashGetSectorOffset(flash, first_sector);
+ break;
+ }
+ }
+
+#endif // defined(WEAR_LEVELING_EFL_FIRST_SECTOR)
+
+ return true;
+}
+
+bool backing_store_unlock(void) {
+ bs_dprintf("Unlock\n");
+ return eflStart(&EFLD1, NULL) == HAL_RET_SUCCESS;
+}
+
+bool backing_store_erase(void) {
+#ifdef WEAR_LEVELING_DEBUG_OUTPUT
+ uint32_t start = timer_read32();
+#endif
+
+ bool ret = true;
+ flash_error_t status;
+ for (int i = 0; i < sector_count; ++i) {
+ // Kick off the sector erase
+ status = flashStartEraseSector(flash, first_sector + i);
+ if (status != FLASH_NO_ERROR && status != FLASH_BUSY_ERASING) {
+ ret = false;
+ }
+
+ // Wait for the erase to complete
+ status = flashWaitErase(flash);
+ if (status != FLASH_NO_ERROR && status != FLASH_BUSY_ERASING) {
+ ret = false;
+ }
+ }
+
+ bs_dprintf("Backing store erase took %ldms to complete\n", ((long)(timer_read32() - start)));
+ return ret;
+}
+
+bool backing_store_write(uint32_t address, backing_store_int_t value) {
+ uint32_t offset = (base_offset + address);
+ bs_dprintf("Write ");
+ wl_dump(offset, &value, sizeof(value));
+ value = ~value;
+ return flashProgram(flash, offset, sizeof(value), (const uint8_t *)&value) == FLASH_NO_ERROR;
+}
+
+bool backing_store_lock(void) {
+ bs_dprintf("Lock \n");
+ eflStop(&EFLD1);
+ return true;
+}
+
+bool backing_store_read(uint32_t address, backing_store_int_t *value) {
+ uint32_t offset = (base_offset + address);
+ backing_store_int_t *loc = (backing_store_int_t *)offset;
+ *value = ~(*loc);
+ bs_dprintf("Read ");
+ wl_dump(offset, value, sizeof(backing_store_int_t));
+ return true;
+}
diff --git a/platforms/chibios/drivers/wear_leveling/wear_leveling_efl_config.h b/platforms/chibios/drivers/wear_leveling/wear_leveling_efl_config.h
new file mode 100644
index 0000000000..9e38c2965d
--- /dev/null
+++ b/platforms/chibios/drivers/wear_leveling/wear_leveling_efl_config.h
@@ -0,0 +1,50 @@
+// Copyright 2022 Nick Brassel (@tzarc)
+// SPDX-License-Identifier: GPL-2.0-or-later
+#pragma once
+
+#ifndef __ASSEMBLER__
+# include <hal.h>
+#endif
+
+// Work out how many bytes per write to internal flash
+#ifndef BACKING_STORE_WRITE_SIZE
+// These need to match EFL's XXXXXX_FLASH_LINE_SIZE, see associated code in `lib/chibios/os/hal/ports/**/hal_efl_lld.c`,
+// or associated `stm32_registry.h` for the MCU in question (or equivalent for the family).
+# if defined(QMK_MCU_SERIES_GD32VF103)
+# define BACKING_STORE_WRITE_SIZE 2 // from hal_efl_lld.c
+# elif defined(QMK_MCU_FAMILY_NUC123)
+# define BACKING_STORE_WRITE_SIZE 4 // from hal_efl_lld.c
+# elif defined(QMK_MCU_FAMILY_STM32)
+# if defined(STM32_FLASH_LINE_SIZE) // from some family's stm32_registry.h file
+# define BACKING_STORE_WRITE_SIZE (STM32_FLASH_LINE_SIZE)
+# else
+# if defined(QMK_MCU_SERIES_STM32F1XX)
+# define BACKING_STORE_WRITE_SIZE 2 // from hal_efl_lld.c
+# elif defined(QMK_MCU_SERIES_STM32F3XX)
+# define BACKING_STORE_WRITE_SIZE 2 // from hal_efl_lld.c
+# elif defined(QMK_MCU_SERIES_STM32F4XX)
+# define BACKING_STORE_WRITE_SIZE (1 << STM32_FLASH_PSIZE) // from hal_efl_lld.c
+# elif defined(QMK_MCU_SERIES_STM32L4XX)
+# define BACKING_STORE_WRITE_SIZE 8 // from hal_efl_lld.c
+# elif defined(QMK_MCU_SERIES_STM32G0XX)
+# define BACKING_STORE_WRITE_SIZE 8 // from hal_efl_lld.c
+# elif defined(QMK_MCU_SERIES_STM32G4XX)
+# define BACKING_STORE_WRITE_SIZE 8 // from hal_efl_lld.c
+# else
+# error "ChibiOS hasn't defined STM32_FLASH_LINE_SIZE, and could not automatically determine BACKING_STORE_WRITE_SIZE" // normally defined in stm32_registry.h, should be set by STM32_FLASH_LINE_SIZE
+# endif
+# endif
+# else
+# error "Could not automatically determine BACKING_STORE_WRITE_SIZE"
+# endif
+#endif
+
+// 2kB backing space allocated
+#ifndef WEAR_LEVELING_BACKING_SIZE
+# define WEAR_LEVELING_BACKING_SIZE 2048
+#endif // WEAR_LEVELING_BACKING_SIZE
+
+// 1kB logical EEPROM
+#ifndef WEAR_LEVELING_LOGICAL_SIZE
+# define WEAR_LEVELING_LOGICAL_SIZE 1024
+#endif // WEAR_LEVELING_LOGICAL_SIZE
diff --git a/platforms/chibios/drivers/wear_leveling/wear_leveling_legacy.c b/platforms/chibios/drivers/wear_leveling/wear_leveling_legacy.c
new file mode 100644
index 0000000000..87126c4467
--- /dev/null
+++ b/platforms/chibios/drivers/wear_leveling/wear_leveling_legacy.c
@@ -0,0 +1,59 @@
+// Copyright 2022 Nick Brassel (@tzarc)
+// SPDX-License-Identifier: GPL-2.0-or-later
+#include <stdbool.h>
+#include <hal.h>
+#include "timer.h"
+#include "wear_leveling.h"
+#include "wear_leveling_internal.h"
+#include "flash_stm32.h"
+
+bool backing_store_init(void) {
+ bs_dprintf("Init\n");
+ return true;
+}
+
+bool backing_store_unlock(void) {
+ bs_dprintf("Unlock\n");
+ FLASH_Unlock();
+ return true;
+}
+
+bool backing_store_erase(void) {
+#ifdef WEAR_LEVELING_DEBUG_OUTPUT
+ uint32_t start = timer_read32();
+#endif
+
+ bool ret = true;
+ FLASH_Status status;
+ for (int i = 0; i < (WEAR_LEVELING_LEGACY_EMULATION_PAGE_COUNT); ++i) {
+ status = FLASH_ErasePage(WEAR_LEVELING_LEGACY_EMULATION_BASE_PAGE_ADDRESS + (i * (WEAR_LEVELING_LEGACY_EMULATION_PAGE_SIZE)));
+ if (status != FLASH_COMPLETE) {
+ ret = false;
+ }
+ }
+
+ bs_dprintf("Backing store erase took %ldms to complete\n", ((long)(timer_read32() - start)));
+ return ret;
+}
+
+bool backing_store_write(uint32_t address, backing_store_int_t value) {
+ uint32_t offset = ((WEAR_LEVELING_LEGACY_EMULATION_BASE_PAGE_ADDRESS) + address);
+ bs_dprintf("Write ");
+ wl_dump(offset, &value, sizeof(backing_store_int_t));
+ return FLASH_ProgramHalfWord(offset, ~value) == FLASH_COMPLETE;
+}
+
+bool backing_store_lock(void) {
+ bs_dprintf("Lock \n");
+ FLASH_Lock();
+ return true;
+}
+
+bool backing_store_read(uint32_t address, backing_store_int_t* value) {
+ uint32_t offset = ((WEAR_LEVELING_LEGACY_EMULATION_BASE_PAGE_ADDRESS) + address);
+ backing_store_int_t* loc = (backing_store_int_t*)offset;
+ *value = ~(*loc);
+ bs_dprintf("Read ");
+ wl_dump(offset, loc, sizeof(backing_store_int_t));
+ return true;
+}
diff --git a/platforms/chibios/drivers/wear_leveling/wear_leveling_legacy_config.h b/platforms/chibios/drivers/wear_leveling/wear_leveling_legacy_config.h
new file mode 100644
index 0000000000..1e4691a6c0
--- /dev/null
+++ b/platforms/chibios/drivers/wear_leveling/wear_leveling_legacy_config.h
@@ -0,0 +1,67 @@
+// Copyright 2022 Nick Brassel (@tzarc)
+// SPDX-License-Identifier: GPL-2.0-or-later
+#pragma once
+
+// Work out the page size to use
+#ifndef WEAR_LEVELING_LEGACY_EMULATION_PAGE_SIZE
+# if defined(QMK_MCU_STM32F042)
+# define WEAR_LEVELING_LEGACY_EMULATION_PAGE_SIZE 1024
+# elif defined(QMK_MCU_STM32F070) || defined(QMK_MCU_STM32F072)
+# define WEAR_LEVELING_LEGACY_EMULATION_PAGE_SIZE 2048
+# elif defined(QMK_MCU_STM32F401) || defined(QMK_MCU_STM32F411)
+# define WEAR_LEVELING_LEGACY_EMULATION_PAGE_SIZE 16384
+# endif
+#endif
+
+// Work out how much flash space we have
+#ifndef WEAR_LEVELING_LEGACY_EMULATION_FLASH_SIZE
+# define WEAR_LEVELING_LEGACY_EMULATION_FLASH_SIZE ((*(uint32_t *)FLASHSIZE_BASE) & 0xFFFFU) // in kB
+#endif
+
+// The base location of program memory
+#ifndef WEAR_LEVELING_LEGACY_EMULATION_FLASH_BASE
+# define WEAR_LEVELING_LEGACY_EMULATION_FLASH_BASE 0x08000000
+#endif
+
+// The number of pages to use
+#ifndef WEAR_LEVELING_LEGACY_EMULATION_PAGE_COUNT
+# if defined(QMK_MCU_STM32F042)
+# define WEAR_LEVELING_LEGACY_EMULATION_PAGE_COUNT 2
+# elif defined(QMK_MCU_STM32F070) || defined(QMK_MCU_STM32F072)
+# define WEAR_LEVELING_LEGACY_EMULATION_PAGE_COUNT 1
+# elif defined(QMK_MCU_STM32F401) || defined(QMK_MCU_STM32F411)
+# define WEAR_LEVELING_LEGACY_EMULATION_PAGE_COUNT 1
+# endif
+#endif
+
+// The origin of the emulated eeprom
+#ifndef WEAR_LEVELING_LEGACY_EMULATION_BASE_PAGE_ADDRESS
+# if defined(QMK_MCU_STM32F042) || defined(QMK_MCU_STM32F070) || defined(QMK_MCU_STM32F072)
+# define WEAR_LEVELING_LEGACY_EMULATION_BASE_PAGE_ADDRESS ((uintptr_t)(WEAR_LEVELING_LEGACY_EMULATION_FLASH_BASE) + WEAR_LEVELING_LEGACY_EMULATION_FLASH_SIZE * 1024 - (WEAR_LEVELING_LEGACY_EMULATION_PAGE_COUNT * WEAR_LEVELING_LEGACY_EMULATION_PAGE_SIZE))
+# elif defined(QMK_MCU_STM32F401) || defined(QMK_MCU_STM32F411)
+# if defined(BOOTLOADER_STM32)
+# define WEAR_LEVELING_LEGACY_EMULATION_BASE_PAGE_ADDRESS (WEAR_LEVELING_LEGACY_EMULATION_FLASH_BASE + (1 * (WEAR_LEVELING_LEGACY_EMULATION_PAGE_SIZE))) // +16k
+# elif defined(BOOTLOADER_TINYUF2)
+# define WEAR_LEVELING_LEGACY_EMULATION_BASE_PAGE_ADDRESS (WEAR_LEVELING_LEGACY_EMULATION_FLASH_BASE + (3 * (WEAR_LEVELING_LEGACY_EMULATION_PAGE_SIZE))) // +48k
+# endif
+# endif
+#endif
+
+// 2-byte writes
+#ifndef BACKING_STORE_WRITE_SIZE
+# define BACKING_STORE_WRITE_SIZE 2
+#endif
+
+// The amount of space to use for the entire set of emulation
+#ifndef WEAR_LEVELING_BACKING_SIZE
+# if defined(QMK_MCU_STM32F042) || defined(QMK_MCU_STM32F070) || defined(QMK_MCU_STM32F072)
+# define WEAR_LEVELING_BACKING_SIZE 2048
+# elif defined(QMK_MCU_STM32F401) || defined(QMK_MCU_STM32F411)
+# define WEAR_LEVELING_BACKING_SIZE 16384
+# endif
+#endif
+
+// The logical amount of eeprom available
+#ifndef WEAR_LEVELING_LOGICAL_SIZE
+# define WEAR_LEVELING_LOGICAL_SIZE 1024
+#endif
diff --git a/platforms/chibios/platform.mk b/platforms/chibios/platform.mk
index a30ca62bf5..72428a762f 100644
--- a/platforms/chibios/platform.mk
+++ b/platforms/chibios/platform.mk
@@ -94,6 +94,11 @@ ifeq ("$(wildcard $(PLATFORM_MK))","")
endif
endif
+# If no MCU architecture specified, use the MCU instead (allows for mcu_selection.mk to swap to cortex-m0 etc.)
+ifeq ("$(MCU_ARCH)","")
+ MCU_ARCH = $(MCU)
+endif
+
include $(STARTUP_MK)
include $(PORT_V)
include $(PLATFORM_MK)
diff --git a/platforms/eeprom.h b/platforms/eeprom.h
index 091e6e4400..8cb7e342dc 100644
--- a/platforms/eeprom.h
+++ b/platforms/eeprom.h
@@ -27,6 +27,8 @@ void eeprom_update_block(const void *__src, void *__dst, size_t __n);
# error EEPROM_SIZE has not been defined for custom driver.
# endif
# define TOTAL_EEPROM_BYTE_COUNT (EEPROM_SIZE)
+#elif defined(EEPROM_WEAR_LEVELING)
+# define TOTAL_EEPROM_BYTE_COUNT (WEAR_LEVELING_LOGICAL_SIZE)
#elif defined(EEPROM_TRANSIENT)
# include "eeprom_transient.h"
# define TOTAL_EEPROM_BYTE_COUNT (TRANSIENT_EEPROM_SIZE)