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author | Takeshi ISHII <2170248+mtei@users.noreply.github.com> | 2021-08-24 22:34:24 +0900 |
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committer | GitHub <noreply@github.com> | 2021-08-24 14:34:24 +0100 |
commit | c9c60d227e38abdf08ca86bcdad3a0cac2579e3f (patch) | |
tree | 03ec990a4d98c4a94330e4cccaadc76bc7381c67 /tmk_core/common/avr | |
parent | c4dbf4bf0118dd785802861beb247433b5b7411d (diff) | |
download | qmk_firmware-c9c60d227e38abdf08ca86bcdad3a0cac2579e3f.tar.gz qmk_firmware-c9c60d227e38abdf08ca86bcdad3a0cac2579e3f.zip |
add wait_cpuclock() macro for AVR and CPU_CLOCK macro (#12755)
Diffstat (limited to 'tmk_core/common/avr')
-rw-r--r-- | tmk_core/common/avr/_wait.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/tmk_core/common/avr/_wait.h b/tmk_core/common/avr/_wait.h index ae1a25131a..683db6ae57 100644 --- a/tmk_core/common/avr/_wait.h +++ b/tmk_core/common/avr/_wait.h @@ -37,6 +37,8 @@ } \ } \ } while (0) +#define wait_cpuclock(n) __builtin_avr_delay_cycles(n) +#define CPU_CLOCK F_CPU /* The AVR series GPIOs have a one clock read delay for changes in the digital input signal. * But here's more margin to make it two clocks. */ @@ -44,4 +46,4 @@ # define GPIO_INPUT_PIN_DELAY 2 #endif -#define waitInputPinDelay() __builtin_avr_delay_cycles(GPIO_INPUT_PIN_DELAY) +#define waitInputPinDelay() wait_cpuclock(GPIO_INPUT_PIN_DELAY) |