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-rw-r--r--drivers/chibios/analog.c276
-rw-r--r--drivers/chibios/analog.h41
-rw-r--r--drivers/chibios/i2c_master.c114
-rw-r--r--drivers/chibios/i2c_master.h106
-rw-r--r--drivers/chibios/ws2812.c95
-rw-r--r--drivers/chibios/ws2812.h16
-rw-r--r--drivers/chibios/ws2812_pwm.c207
-rw-r--r--drivers/chibios/ws2812_spi.c90
8 files changed, 945 insertions, 0 deletions
diff --git a/drivers/chibios/analog.c b/drivers/chibios/analog.c
new file mode 100644
index 0000000000..6f6db64010
--- /dev/null
+++ b/drivers/chibios/analog.c
@@ -0,0 +1,276 @@
+/* Copyright 2019 Drew Mills
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "quantum.h"
+#include "analog.h"
+#include "ch.h"
+#include <hal.h>
+
+#if !HAL_USE_ADC
+# error "You need to set HAL_USE_ADC to TRUE in your halconf.h to use the ADC."
+#endif
+
+#if !STM32_ADC_USE_ADC1 && !STM32_ADC_USE_ADC2 && !STM32_ADC_USE_ADC3 && !STM32_ADC_USE_ADC4
+# error "You need to set one of the 'STM32_ADC_USE_ADCx' settings to TRUE in your mcuconf.h to use the ADC."
+#endif
+
+#if STM32_ADC_DUAL_MODE
+# error "STM32 ADC Dual Mode is not supported at this time."
+#endif
+
+#if STM32_ADCV3_OVERSAMPLING
+# error "STM32 ADCV3 Oversampling is not supported at this time."
+#endif
+
+// Otherwise assume V3
+#if defined(STM32F0XX) || defined(STM32L0XX)
+# define USE_ADCV1
+#elif defined(STM32F1XX) || defined(STM32F2XX) || defined(STM32F4XX)
+# define USE_ADCV2
+#endif
+
+// BODGE to make v2 look like v1,3 and 4
+#ifdef USE_ADCV2
+# if !defined(ADC_SMPR_SMP_1P5) && defined(ADC_SAMPLE_3)
+# define ADC_SMPR_SMP_1P5 ADC_SAMPLE_3
+# define ADC_SMPR_SMP_7P5 ADC_SAMPLE_15
+# define ADC_SMPR_SMP_13P5 ADC_SAMPLE_28
+# define ADC_SMPR_SMP_28P5 ADC_SAMPLE_56
+# define ADC_SMPR_SMP_41P5 ADC_SAMPLE_84
+# define ADC_SMPR_SMP_55P5 ADC_SAMPLE_112
+# define ADC_SMPR_SMP_71P5 ADC_SAMPLE_144
+# define ADC_SMPR_SMP_239P5 ADC_SAMPLE_480
+# endif
+
+# if !defined(ADC_SMPR_SMP_1P5) && defined(ADC_SAMPLE_1P5)
+# define ADC_SMPR_SMP_1P5 ADC_SAMPLE_1P5
+# define ADC_SMPR_SMP_7P5 ADC_SAMPLE_7P5
+# define ADC_SMPR_SMP_13P5 ADC_SAMPLE_13P5
+# define ADC_SMPR_SMP_28P5 ADC_SAMPLE_28P5
+# define ADC_SMPR_SMP_41P5 ADC_SAMPLE_41P5
+# define ADC_SMPR_SMP_55P5 ADC_SAMPLE_55P5
+# define ADC_SMPR_SMP_71P5 ADC_SAMPLE_71P5
+# define ADC_SMPR_SMP_239P5 ADC_SAMPLE_239P5
+# endif
+
+// we still sample at 12bit, but scale down to the requested bit range
+# define ADC_CFGR1_RES_12BIT 12
+# define ADC_CFGR1_RES_10BIT 10
+# define ADC_CFGR1_RES_8BIT 8
+# define ADC_CFGR1_RES_6BIT 6
+#endif
+
+/* User configurable ADC options */
+#ifndef ADC_COUNT
+# if defined(STM32F0XX) || defined(STM32F1XX) || defined(STM32F4XX)
+# define ADC_COUNT 1
+# elif defined(STM32F3XX)
+# define ADC_COUNT 4
+# else
+# error "ADC_COUNT has not been set for this ARM microcontroller."
+# endif
+#endif
+
+#ifndef ADC_NUM_CHANNELS
+# define ADC_NUM_CHANNELS 1
+#elif ADC_NUM_CHANNELS != 1
+# error "The ARM ADC implementation currently only supports reading one channel at a time."
+#endif
+
+#ifndef ADC_BUFFER_DEPTH
+# define ADC_BUFFER_DEPTH 1
+#endif
+
+// For more sampling rate options, look at hal_adc_lld.h in ChibiOS
+#ifndef ADC_SAMPLING_RATE
+# define ADC_SAMPLING_RATE ADC_SMPR_SMP_1P5
+#endif
+
+// Options are 12, 10, 8, and 6 bit.
+#ifndef ADC_RESOLUTION
+# define ADC_RESOLUTION ADC_CFGR1_RES_10BIT
+#endif
+
+static ADCConfig adcCfg = {};
+static adcsample_t sampleBuffer[ADC_NUM_CHANNELS * ADC_BUFFER_DEPTH];
+
+// Initialize to max number of ADCs, set to empty object to initialize all to false.
+static bool adcInitialized[ADC_COUNT] = {};
+
+// TODO: add back TR handling???
+static ADCConversionGroup adcConversionGroup = {
+ .circular = FALSE,
+ .num_channels = (uint16_t)(ADC_NUM_CHANNELS),
+#if defined(USE_ADCV1)
+ .cfgr1 = ADC_CFGR1_CONT | ADC_RESOLUTION,
+ .smpr = ADC_SAMPLING_RATE,
+#elif defined(USE_ADCV2)
+# if !defined(STM32F1XX)
+ .cr2 = ADC_CR2_SWSTART, // F103 seem very unhappy with, F401 seems very unhappy without...
+# endif
+ .smpr2 = ADC_SMPR2_SMP_AN0(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN1(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN2(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN3(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN4(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN5(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN6(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN7(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN8(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN9(ADC_SAMPLING_RATE),
+ .smpr1 = ADC_SMPR1_SMP_AN10(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN11(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN12(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN13(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN14(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN15(ADC_SAMPLING_RATE),
+#else
+ .cfgr = ADC_CFGR_CONT | ADC_RESOLUTION,
+ .smpr = {ADC_SMPR1_SMP_AN0(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN1(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN2(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN3(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN4(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN5(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN6(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN7(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN8(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN9(ADC_SAMPLING_RATE), ADC_SMPR2_SMP_AN10(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN11(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN12(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN13(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN14(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN15(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN16(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN17(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN18(ADC_SAMPLING_RATE)},
+#endif
+};
+
+// clang-format off
+__attribute__((weak)) adc_mux pinToMux(pin_t pin) {
+ switch (pin) {
+#if defined(STM32F0XX)
+ case A0: return TO_MUX( ADC_CHSELR_CHSEL0, 0 );
+ case A1: return TO_MUX( ADC_CHSELR_CHSEL1, 0 );
+ case A2: return TO_MUX( ADC_CHSELR_CHSEL2, 0 );
+ case A3: return TO_MUX( ADC_CHSELR_CHSEL3, 0 );
+ case A4: return TO_MUX( ADC_CHSELR_CHSEL4, 0 );
+ case A5: return TO_MUX( ADC_CHSELR_CHSEL5, 0 );
+ case A6: return TO_MUX( ADC_CHSELR_CHSEL6, 0 );
+ case A7: return TO_MUX( ADC_CHSELR_CHSEL7, 0 );
+ case B0: return TO_MUX( ADC_CHSELR_CHSEL8, 0 );
+ case B1: return TO_MUX( ADC_CHSELR_CHSEL9, 0 );
+ case C0: return TO_MUX( ADC_CHSELR_CHSEL10, 0 );
+ case C1: return TO_MUX( ADC_CHSELR_CHSEL11, 0 );
+ case C2: return TO_MUX( ADC_CHSELR_CHSEL12, 0 );
+ case C3: return TO_MUX( ADC_CHSELR_CHSEL13, 0 );
+ case C4: return TO_MUX( ADC_CHSELR_CHSEL14, 0 );
+ case C5: return TO_MUX( ADC_CHSELR_CHSEL15, 0 );
+#elif defined(STM32F3XX)
+ case A0: return TO_MUX( ADC_CHANNEL_IN1, 0 );
+ case A1: return TO_MUX( ADC_CHANNEL_IN2, 0 );
+ case A2: return TO_MUX( ADC_CHANNEL_IN3, 0 );
+ case A3: return TO_MUX( ADC_CHANNEL_IN4, 0 );
+ case A4: return TO_MUX( ADC_CHANNEL_IN1, 1 );
+ case A5: return TO_MUX( ADC_CHANNEL_IN2, 1 );
+ case A6: return TO_MUX( ADC_CHANNEL_IN3, 1 );
+ case A7: return TO_MUX( ADC_CHANNEL_IN4, 1 );
+ case B0: return TO_MUX( ADC_CHANNEL_IN12, 2 );
+ case B1: return TO_MUX( ADC_CHANNEL_IN1, 2 );
+ case B2: return TO_MUX( ADC_CHANNEL_IN12, 1 );
+ case B12: return TO_MUX( ADC_CHANNEL_IN2, 3 );
+ case B13: return TO_MUX( ADC_CHANNEL_IN3, 3 );
+ case B14: return TO_MUX( ADC_CHANNEL_IN4, 3 );
+ case B15: return TO_MUX( ADC_CHANNEL_IN5, 3 );
+ case C0: return TO_MUX( ADC_CHANNEL_IN6, 0 ); // Can also be ADC2
+ case C1: return TO_MUX( ADC_CHANNEL_IN7, 0 ); // Can also be ADC2
+ case C2: return TO_MUX( ADC_CHANNEL_IN8, 0 ); // Can also be ADC2
+ case C3: return TO_MUX( ADC_CHANNEL_IN9, 0 ); // Can also be ADC2
+ case C4: return TO_MUX( ADC_CHANNEL_IN5, 1 );
+ case C5: return TO_MUX( ADC_CHANNEL_IN11, 1 );
+ case D8: return TO_MUX( ADC_CHANNEL_IN12, 3 );
+ case D9: return TO_MUX( ADC_CHANNEL_IN13, 3 );
+ case D10: return TO_MUX( ADC_CHANNEL_IN7, 2 ); // Can also be ADC4
+ case D11: return TO_MUX( ADC_CHANNEL_IN8, 2 ); // Can also be ADC4
+ case D12: return TO_MUX( ADC_CHANNEL_IN9, 2 ); // Can also be ADC4
+ case D13: return TO_MUX( ADC_CHANNEL_IN10, 2 ); // Can also be ADC4
+ case D14: return TO_MUX( ADC_CHANNEL_IN11, 2 ); // Can also be ADC4
+ case E7: return TO_MUX( ADC_CHANNEL_IN13, 2 );
+ case E8: return TO_MUX( ADC_CHANNEL_IN6, 2 ); // Can also be ADC4
+ case E9: return TO_MUX( ADC_CHANNEL_IN2, 2 );
+ case E10: return TO_MUX( ADC_CHANNEL_IN14, 2 );
+ case E11: return TO_MUX( ADC_CHANNEL_IN15, 2 );
+ case E12: return TO_MUX( ADC_CHANNEL_IN16, 2 );
+ case E13: return TO_MUX( ADC_CHANNEL_IN3, 2 );
+ case E14: return TO_MUX( ADC_CHANNEL_IN1, 3 );
+ case E15: return TO_MUX( ADC_CHANNEL_IN2, 3 );
+ case F2: return TO_MUX( ADC_CHANNEL_IN10, 0 ); // Can also be ADC2
+ case F4: return TO_MUX( ADC_CHANNEL_IN5, 0 );
+#elif defined(STM32F4XX) // TODO: add all pins
+ case A0: return TO_MUX( ADC_CHANNEL_IN0, 0 );
+ //case A1: return TO_MUX( ADC_CHANNEL_IN1, 0 );
+#elif defined(STM32F1XX) // TODO: add all pins
+ case A0: return TO_MUX( ADC_CHANNEL_IN0, 0 );
+#endif
+ }
+
+ // return an adc that would never be used so intToADCDriver will bail out
+ return TO_MUX(0, 0xFF);
+}
+// clang-format on
+
+static inline ADCDriver* intToADCDriver(uint8_t adcInt) {
+ switch (adcInt) {
+#if STM32_ADC_USE_ADC1
+ case 0:
+ return &ADCD1;
+#endif
+#if STM32_ADC_USE_ADC2
+ case 1:
+ return &ADCD2;
+#endif
+#if STM32_ADC_USE_ADC3
+ case 2:
+ return &ADCD3;
+#endif
+#if STM32_ADC_USE_ADC4
+ case 3:
+ return &ADCD4;
+#endif
+ }
+
+ return NULL;
+}
+
+static inline void manageAdcInitializationDriver(uint8_t adc, ADCDriver* adcDriver) {
+ if (!adcInitialized[adc]) {
+ adcStart(adcDriver, &adcCfg);
+ adcInitialized[adc] = true;
+ }
+}
+
+int16_t analogReadPin(pin_t pin) {
+ palSetLineMode(pin, PAL_MODE_INPUT_ANALOG);
+
+ return adc_read(pinToMux(pin));
+}
+
+int16_t analogReadPinAdc(pin_t pin, uint8_t adc) {
+ palSetLineMode(pin, PAL_MODE_INPUT_ANALOG);
+
+ adc_mux target = pinToMux(pin);
+ target.adc = adc;
+ return adc_read(target);
+}
+
+int16_t adc_read(adc_mux mux) {
+#if defined(USE_ADCV1)
+ // TODO: fix previous assumption of only 1 input...
+ adcConversionGroup.chselr = 1 << mux.input; /*no macro to convert N to ADC_CHSELR_CHSEL1*/
+#elif defined(USE_ADCV2)
+ adcConversionGroup.sqr3 = ADC_SQR3_SQ1_N(mux.input);
+#else
+ adcConversionGroup.sqr[0] = ADC_SQR1_SQ1_N(mux.input);
+#endif
+
+ ADCDriver* targetDriver = intToADCDriver(mux.adc);
+ if (!targetDriver) {
+ return 0;
+ }
+
+ manageAdcInitializationDriver(mux.adc, targetDriver);
+ if (adcConvert(targetDriver, &adcConversionGroup, &sampleBuffer[0], ADC_BUFFER_DEPTH) != MSG_OK) {
+ return 0;
+ }
+
+#ifdef USE_ADCV2
+ // fake 12-bit -> N-bit scale
+ return (*sampleBuffer) >> (12 - ADC_RESOLUTION);
+#else
+ // already handled as part of adcConvert
+ return *sampleBuffer;
+#endif
+}
diff --git a/drivers/chibios/analog.h b/drivers/chibios/analog.h
new file mode 100644
index 0000000000..e61c394265
--- /dev/null
+++ b/drivers/chibios/analog.h
@@ -0,0 +1,41 @@
+/* Copyright 2019 Drew Mills
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include "quantum.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct {
+ uint16_t input;
+ uint8_t adc;
+} adc_mux;
+#define TO_MUX(i, a) \
+ (adc_mux) { i, a }
+
+int16_t analogReadPin(pin_t pin);
+int16_t analogReadPinAdc(pin_t pin, uint8_t adc);
+adc_mux pinToMux(pin_t pin);
+
+int16_t adc_read(adc_mux mux);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/drivers/chibios/i2c_master.c b/drivers/chibios/i2c_master.c
new file mode 100644
index 0000000000..ede915fa4a
--- /dev/null
+++ b/drivers/chibios/i2c_master.c
@@ -0,0 +1,114 @@
+/* Copyright 2018 Jack Humbert
+ * Copyright 2018 Yiancar
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/* This library is only valid for STM32 processors.
+ * This library follows the convention of the AVR i2c_master library.
+ * As a result addresses are expected to be already shifted (addr << 1).
+ * I2CD1 is the default driver which corresponds to pins B6 and B7. This
+ * can be changed.
+ * Please ensure that HAL_USE_I2C is TRUE in the halconf.h file and that
+ * STM32_I2C_USE_I2C1 is TRUE in the mcuconf.h file. Pins B6 and B7 are used
+ * but using any other I2C pins should be trivial.
+ */
+#include "quantum.h"
+#include "i2c_master.h"
+#include <string.h>
+#include <hal.h>
+
+static uint8_t i2c_address;
+
+static const I2CConfig i2cconfig = {
+#ifdef USE_I2CV1
+ I2C1_OPMODE,
+ I2C1_CLOCK_SPEED,
+ I2C1_DUTY_CYCLE,
+#else
+ // This configures the I2C clock to 400khz assuming a 72Mhz clock
+ // For more info : https://www.st.com/en/embedded-software/stsw-stm32126.html
+ STM32_TIMINGR_PRESC(I2C1_TIMINGR_PRESC) | STM32_TIMINGR_SCLDEL(I2C1_TIMINGR_SCLDEL) | STM32_TIMINGR_SDADEL(I2C1_TIMINGR_SDADEL) | STM32_TIMINGR_SCLH(I2C1_TIMINGR_SCLH) | STM32_TIMINGR_SCLL(I2C1_TIMINGR_SCLL), 0, 0
+#endif
+};
+
+static i2c_status_t chibios_to_qmk(const msg_t* status) {
+ switch (*status) {
+ case I2C_NO_ERROR:
+ return I2C_STATUS_SUCCESS;
+ case I2C_TIMEOUT:
+ return I2C_STATUS_TIMEOUT;
+ // I2C_BUS_ERROR, I2C_ARBITRATION_LOST, I2C_ACK_FAILURE, I2C_OVERRUN, I2C_PEC_ERROR, I2C_SMB_ALERT
+ default:
+ return I2C_STATUS_ERROR;
+ }
+}
+
+__attribute__((weak)) void i2c_init(void) {
+ // Try releasing special pins for a short time
+ palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_INPUT);
+ palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_INPUT);
+
+ chThdSleepMilliseconds(10);
+#if defined(USE_GPIOV1)
+ palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_STM32_ALTERNATE_OPENDRAIN);
+ palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_STM32_ALTERNATE_OPENDRAIN);
+#else
+ palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_ALTERNATE(I2C1_SCL_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN);
+ palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_ALTERNATE(I2C1_SDA_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN);
+#endif
+}
+
+i2c_status_t i2c_start(uint8_t address) {
+ i2c_address = address;
+ i2cStart(&I2C_DRIVER, &i2cconfig);
+ return I2C_STATUS_SUCCESS;
+}
+
+i2c_status_t i2c_transmit(uint8_t address, const uint8_t* data, uint16_t length, uint16_t timeout) {
+ i2c_address = address;
+ i2cStart(&I2C_DRIVER, &i2cconfig);
+ msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), data, length, 0, 0, TIME_MS2I(timeout));
+ return chibios_to_qmk(&status);
+}
+
+i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout) {
+ i2c_address = address;
+ i2cStart(&I2C_DRIVER, &i2cconfig);
+ msg_t status = i2cMasterReceiveTimeout(&I2C_DRIVER, (i2c_address >> 1), data, length, TIME_MS2I(timeout));
+ return chibios_to_qmk(&status);
+}
+
+i2c_status_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, const uint8_t* data, uint16_t length, uint16_t timeout) {
+ i2c_address = devaddr;
+ i2cStart(&I2C_DRIVER, &i2cconfig);
+
+ uint8_t complete_packet[length + 1];
+ for (uint8_t i = 0; i < length; i++) {
+ complete_packet[i + 1] = data[i];
+ }
+ complete_packet[0] = regaddr;
+
+ msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), complete_packet, length + 1, 0, 0, TIME_MS2I(timeout));
+ return chibios_to_qmk(&status);
+}
+
+i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout) {
+ i2c_address = devaddr;
+ i2cStart(&I2C_DRIVER, &i2cconfig);
+ msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), &regaddr, 1, data, length, TIME_MS2I(timeout));
+ return chibios_to_qmk(&status);
+}
+
+void i2c_stop(void) { i2cStop(&I2C_DRIVER); }
diff --git a/drivers/chibios/i2c_master.h b/drivers/chibios/i2c_master.h
new file mode 100644
index 0000000000..3d3891289f
--- /dev/null
+++ b/drivers/chibios/i2c_master.h
@@ -0,0 +1,106 @@
+/* Copyright 2018 Jack Humbert
+ * Copyright 2018 Yiancar
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/* This library follows the convention of the AVR i2c_master library.
+ * As a result addresses are expected to be already shifted (addr << 1).
+ * I2CD1 is the default driver which corresponds to pins B6 and B7. This
+ * can be changed.
+ * Please ensure that HAL_USE_I2C is TRUE in the halconf.h file and that
+ * STM32_I2C_USE_I2C1 is TRUE in the mcuconf.h file.
+ */
+#pragma once
+
+#include "ch.h"
+#include <hal.h>
+
+#ifdef I2C1_BANK
+# define I2C1_SCL_BANK I2C1_BANK
+# define I2C1_SDA_BANK I2C1_BANK
+#endif
+
+#ifndef I2C1_SCL_BANK
+# define I2C1_SCL_BANK GPIOB
+#endif
+
+#ifndef I2C1_SDA_BANK
+# define I2C1_SDA_BANK GPIOB
+#endif
+
+#ifndef I2C1_SCL
+# define I2C1_SCL 6
+#endif
+#ifndef I2C1_SDA
+# define I2C1_SDA 7
+#endif
+
+#ifdef USE_I2CV1
+# ifndef I2C1_OPMODE
+# define I2C1_OPMODE OPMODE_I2C
+# endif
+# ifndef I2C1_CLOCK_SPEED
+# define I2C1_CLOCK_SPEED 100000 /* 400000 */
+# endif
+# ifndef I2C1_DUTY_CYCLE
+# define I2C1_DUTY_CYCLE STD_DUTY_CYCLE /* FAST_DUTY_CYCLE_2 */
+# endif
+#else
+// The default timing values below configures the I2C clock to 400khz assuming a 72Mhz clock
+// For more info : https://www.st.com/en/embedded-software/stsw-stm32126.html
+# ifndef I2C1_TIMINGR_PRESC
+# define I2C1_TIMINGR_PRESC 0U
+# endif
+# ifndef I2C1_TIMINGR_SCLDEL
+# define I2C1_TIMINGR_SCLDEL 7U
+# endif
+# ifndef I2C1_TIMINGR_SDADEL
+# define I2C1_TIMINGR_SDADEL 0U
+# endif
+# ifndef I2C1_TIMINGR_SCLH
+# define I2C1_TIMINGR_SCLH 38U
+# endif
+# ifndef I2C1_TIMINGR_SCLL
+# define I2C1_TIMINGR_SCLL 129U
+# endif
+#endif
+
+#ifndef I2C_DRIVER
+# define I2C_DRIVER I2CD1
+#endif
+
+#ifndef USE_GPIOV1
+// The default PAL alternate modes are used to signal that the pins are used for I2C
+# ifndef I2C1_SCL_PAL_MODE
+# define I2C1_SCL_PAL_MODE 4
+# endif
+# ifndef I2C1_SDA_PAL_MODE
+# define I2C1_SDA_PAL_MODE 4
+# endif
+#endif
+
+typedef int16_t i2c_status_t;
+
+#define I2C_STATUS_SUCCESS (0)
+#define I2C_STATUS_ERROR (-1)
+#define I2C_STATUS_TIMEOUT (-2)
+
+void i2c_init(void);
+i2c_status_t i2c_start(uint8_t address);
+i2c_status_t i2c_transmit(uint8_t address, const uint8_t* data, uint16_t length, uint16_t timeout);
+i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout);
+i2c_status_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, const uint8_t* data, uint16_t length, uint16_t timeout);
+i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout);
+void i2c_stop(void);
diff --git a/drivers/chibios/ws2812.c b/drivers/chibios/ws2812.c
new file mode 100644
index 0000000000..bdca565d88
--- /dev/null
+++ b/drivers/chibios/ws2812.c
@@ -0,0 +1,95 @@
+#include "quantum.h"
+#include "ws2812.h"
+#include "ch.h"
+#include "hal.h"
+
+/* Adapted from https://github.com/bigjosh/SimpleNeoPixelDemo/ */
+
+#ifndef NOP_FUDGE
+# if defined(STM32F0XX) || defined(STM32F1XX) || defined(STM32F3XX) || defined(STM32F4XX) || defined(STM32L0XX)
+# define NOP_FUDGE 0.4
+# else
+# error("NOP_FUDGE configuration required")
+# define NOP_FUDGE 1 // this just pleases the compile so the above error is easier to spot
+# endif
+#endif
+
+#define NUMBER_NOPS 6
+#define CYCLES_PER_SEC (STM32_SYSCLK / NUMBER_NOPS * NOP_FUDGE)
+#define NS_PER_SEC (1000000000L) // Note that this has to be SIGNED since we want to be able to check for negative values of derivatives
+#define NS_PER_CYCLE (NS_PER_SEC / CYCLES_PER_SEC)
+#define NS_TO_CYCLES(n) ((n) / NS_PER_CYCLE)
+
+#define wait_ns(x) \
+ do { \
+ for (int i = 0; i < NS_TO_CYCLES(x); i++) { \
+ __asm__ volatile("nop\n\t" \
+ "nop\n\t" \
+ "nop\n\t" \
+ "nop\n\t" \
+ "nop\n\t" \
+ "nop\n\t"); \
+ } \
+ } while (0)
+
+// These are the timing constraints taken mostly from the WS2812 datasheets
+// These are chosen to be conservative and avoid problems rather than for maximum throughput
+
+#define T1H 900 // Width of a 1 bit in ns
+#define T1L (1250 - T1H) // Width of a 1 bit in ns
+
+#define T0H 350 // Width of a 0 bit in ns
+#define T0L (1250 - T0H) // Width of a 0 bit in ns
+
+// The reset gap can be 6000 ns, but depending on the LED strip it may have to be increased
+// to values like 600000 ns. If it is too small, the pixels will show nothing most of the time.
+#define RES 10000 // Width of the low gap between bits to cause a frame to latch
+
+void sendByte(uint8_t byte) {
+ // WS2812 protocol wants most significant bits first
+ for (unsigned char bit = 0; bit < 8; bit++) {
+ bool is_one = byte & (1 << (7 - bit));
+ // using something like wait_ns(is_one ? T1L : T0L) here throws off timings
+ if (is_one) {
+ // 1
+ writePinHigh(RGB_DI_PIN);
+ wait_ns(T1H);
+ writePinLow(RGB_DI_PIN);
+ wait_ns(T1L);
+ } else {
+ // 0
+ writePinHigh(RGB_DI_PIN);
+ wait_ns(T0H);
+ writePinLow(RGB_DI_PIN);
+ wait_ns(T0L);
+ }
+ }
+}
+
+void ws2812_init(void) { setPinOutput(RGB_DI_PIN); }
+
+// Setleds for standard RGB
+void ws2812_setleds(LED_TYPE *ledarray, uint16_t leds) {
+ static bool s_init = false;
+ if (!s_init) {
+ ws2812_init();
+ s_init = true;
+ }
+
+ // this code is very time dependent, so we need to disable interrupts
+ chSysLock();
+
+ for (uint8_t i = 0; i < leds; i++) {
+ // WS2812 protocol dictates grb order
+ sendByte(ledarray[i].g);
+ sendByte(ledarray[i].r);
+ sendByte(ledarray[i].b);
+#ifdef RGBW
+ sendByte(ledarray[i].w);
+#endif
+ }
+
+ wait_ns(RES);
+
+ chSysUnlock();
+}
diff --git a/drivers/chibios/ws2812.h b/drivers/chibios/ws2812.h
new file mode 100644
index 0000000000..41c22a00b8
--- /dev/null
+++ b/drivers/chibios/ws2812.h
@@ -0,0 +1,16 @@
+#pragma once
+
+#include "quantum/color.h"
+
+/* User Interface
+ *
+ * Input:
+ * ledarray: An array of GRB data describing the LED colors
+ * number_of_leds: The number of LEDs to write
+ *
+ * The functions will perform the following actions:
+ * - Set the data-out pin as output
+ * - Send out the LED data
+ * - Wait 50us to reset the LEDs
+ */
+void ws2812_setleds(LED_TYPE *ledarray, uint16_t number_of_leds);
diff --git a/drivers/chibios/ws2812_pwm.c b/drivers/chibios/ws2812_pwm.c
new file mode 100644
index 0000000000..1a17210298
--- /dev/null
+++ b/drivers/chibios/ws2812_pwm.c
@@ -0,0 +1,207 @@
+#include "ws2812.h"
+#include "quantum.h"
+#include "hal.h"
+
+/* Adapted from https://github.com/joewa/WS2812-LED-Driver_ChibiOS/ */
+
+#ifdef RGBW
+# error "RGBW not supported"
+#endif
+
+#ifndef WS2812_PWM_DRIVER
+# define WS2812_PWM_DRIVER PWMD2 // TIMx
+#endif
+#ifndef WS2812_PWM_CHANNEL
+# define WS2812_PWM_CHANNEL 2 // Channel
+#endif
+#ifndef WS2812_PWM_PAL_MODE
+# define WS2812_PWM_PAL_MODE 2 // DI Pin's alternate function value
+#endif
+#ifndef WS2812_DMA_STREAM
+# define WS2812_DMA_STREAM STM32_DMA1_STREAM2 // DMA Stream for TIMx_UP
+#endif
+#ifndef WS2812_DMA_CHANNEL
+# define WS2812_DMA_CHANNEL 2 // DMA Channel for TIMx_UP
+#endif
+
+#ifndef WS2812_PWM_TARGET_PERIOD
+//# define WS2812_PWM_TARGET_PERIOD 800000 // Original code is 800k...?
+# define WS2812_PWM_TARGET_PERIOD 80000 // TODO: work out why 10x less on f303/f4x1
+#endif
+
+/* --- PRIVATE CONSTANTS ---------------------------------------------------- */
+
+#define WS2812_PWM_FREQUENCY (STM32_SYSCLK / 2) /**< Clock frequency of PWM, must be valid with respect to system clock! */
+#define WS2812_PWM_PERIOD (WS2812_PWM_FREQUENCY / WS2812_PWM_TARGET_PERIOD) /**< Clock period in ticks. 1 / 800kHz = 1.25 uS (as per datasheet) */
+
+/**
+ * @brief Number of bit-periods to hold the data line low at the end of a frame
+ *
+ * The reset period for each frame must be at least 50 uS; so we add in 50 bit-times
+ * of zeroes at the end. (50 bits)*(1.25 uS/bit) = 62.5 uS, which gives us some
+ * slack in the timing requirements
+ */
+#define WS2812_RESET_BIT_N (50)
+#define WS2812_COLOR_BIT_N (RGBLED_NUM * 24) /**< Number of data bits */
+#define WS2812_BIT_N (WS2812_COLOR_BIT_N + WS2812_RESET_BIT_N) /**< Total number of bits in a frame */
+
+/**
+ * @brief High period for a zero, in ticks
+ *
+ * Per the datasheet:
+ * WS2812:
+ * - T0H: 200 nS to 500 nS, inclusive
+ * - T0L: 650 nS to 950 nS, inclusive
+ * WS2812B:
+ * - T0H: 200 nS to 500 nS, inclusive
+ * - T0L: 750 nS to 1050 nS, inclusive
+ *
+ * The duty cycle is calculated for a high period of 350 nS.
+ */
+#define WS2812_DUTYCYCLE_0 (WS2812_PWM_FREQUENCY / (1000000000 / 350))
+
+/**
+ * @brief High period for a one, in ticks
+ *
+ * Per the datasheet:
+ * WS2812:
+ * - T1H: 550 nS to 850 nS, inclusive
+ * - T1L: 450 nS to 750 nS, inclusive
+ * WS2812B:
+ * - T1H: 750 nS to 1050 nS, inclusive
+ * - T1L: 200 nS to 500 nS, inclusive
+ *
+ * The duty cycle is calculated for a high period of 800 nS.
+ * This is in the middle of the specifications of the WS2812 and WS2812B.
+ */
+#define WS2812_DUTYCYCLE_1 (WS2812_PWM_FREQUENCY / (1000000000 / 800))
+
+/* --- PRIVATE MACROS ------------------------------------------------------- */
+
+/**
+ * @brief Determine the index in @ref ws2812_frame_buffer "the frame buffer" of a given bit
+ *
+ * @param[in] led: The led index [0, @ref RGBLED_NUM)
+ * @param[in] byte: The byte number [0, 2]
+ * @param[in] bit: The bit number [0, 7]
+ *
+ * @return The bit index
+ */
+#define WS2812_BIT(led, byte, bit) (24 * (led) + 8 * (byte) + (7 - (bit)))
+
+/**
+ * @brief Determine the index in @ref ws2812_frame_buffer "the frame buffer" of a given red bit
+ *
+ * @note The red byte is the middle byte in the color packet
+ *
+ * @param[in] led: The led index [0, @ref RGBLED_NUM)
+ * @param[in] bit: The bit number [0, 7]
+ *
+ * @return The bit index
+ */
+#define WS2812_RED_BIT(led, bit) WS2812_BIT((led), 1, (bit))
+
+/**
+ * @brief Determine the index in @ref ws2812_frame_buffer "the frame buffer" of a given green bit
+ *
+ * @note The red byte is the first byte in the color packet
+ *
+ * @param[in] led: The led index [0, @ref RGBLED_NUM)
+ * @param[in] bit: The bit number [0, 7]
+ *
+ * @return The bit index
+ */
+#define WS2812_GREEN_BIT(led, bit) WS2812_BIT((led), 0, (bit))
+
+/**
+ * @brief Determine the index in @ref ws2812_frame_buffer "the frame buffer" of a given blue bit
+ *
+ * @note The red byte is the last byte in the color packet
+ *
+ * @param[in] led: The led index [0, @ref RGBLED_NUM)
+ * @param[in] bit: The bit index [0, 7]
+ *
+ * @return The bit index
+ */
+#define WS2812_BLUE_BIT(led, bit) WS2812_BIT((led), 2, (bit))
+
+/* --- PRIVATE VARIABLES ---------------------------------------------------- */
+
+static uint32_t ws2812_frame_buffer[WS2812_BIT_N + 1]; /**< Buffer for a frame */
+
+/* --- PUBLIC FUNCTIONS ----------------------------------------------------- */
+/*
+ * Gedanke: Double-buffer type transactions: double buffer transfers using two memory pointers for
+the memory (while the DMA is reading/writing from/to a buffer, the application can
+write/read to/from the other buffer).
+ */
+
+void ws2812_init(void) {
+ // Initialize led frame buffer
+ uint32_t i;
+ for (i = 0; i < WS2812_COLOR_BIT_N; i++) ws2812_frame_buffer[i] = WS2812_DUTYCYCLE_0; // All color bits are zero duty cycle
+ for (i = 0; i < WS2812_RESET_BIT_N; i++) ws2812_frame_buffer[i + WS2812_COLOR_BIT_N] = 0; // All reset bits are zero
+
+#if defined(USE_GPIOV1)
+ palSetLineMode(RGB_DI_PIN, PAL_MODE_STM32_ALTERNATE_PUSHPULL);
+#else
+ palSetLineMode(RGB_DI_PIN, PAL_MODE_ALTERNATE(WS2812_PWM_PAL_MODE) | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUPDR_FLOATING);
+#endif
+
+ // PWM Configuration
+ //#pragma GCC diagnostic ignored "-Woverride-init" // Turn off override-init warning for this struct. We use the overriding ability to set a "default" channel config
+ static const PWMConfig ws2812_pwm_config = {
+ .frequency = WS2812_PWM_FREQUENCY,
+ .period = WS2812_PWM_PERIOD, // Mit dieser Periode wird UDE-Event erzeugt und ein neuer Wert (Länge WS2812_BIT_N) vom DMA ins CCR geschrieben
+ .callback = NULL,
+ .channels =
+ {
+ [0 ... 3] = {.mode = PWM_OUTPUT_DISABLED, .callback = NULL}, // Channels default to disabled
+ [WS2812_PWM_CHANNEL - 1] = {.mode = PWM_OUTPUT_ACTIVE_HIGH, .callback = NULL}, // Turn on the channel we care about
+ },
+ .cr2 = 0,
+ .dier = TIM_DIER_UDE, // DMA on update event for next period
+ };
+ //#pragma GCC diagnostic pop // Restore command-line warning options
+
+ // Configure DMA
+ // dmaInit(); // Joe added this
+ dmaStreamAlloc(WS2812_DMA_STREAM - STM32_DMA1_STREAM1, 10, NULL, NULL);
+ dmaStreamSetPeripheral(WS2812_DMA_STREAM, &(WS2812_PWM_DRIVER.tim->CCR[WS2812_PWM_CHANNEL - 1])); // Ziel ist der An-Zeit im Cap-Comp-Register
+ dmaStreamSetMemory0(WS2812_DMA_STREAM, ws2812_frame_buffer);
+ dmaStreamSetTransactionSize(WS2812_DMA_STREAM, WS2812_BIT_N);
+ dmaStreamSetMode(WS2812_DMA_STREAM, STM32_DMA_CR_CHSEL(WS2812_DMA_CHANNEL) | STM32_DMA_CR_DIR_M2P | STM32_DMA_CR_PSIZE_WORD | STM32_DMA_CR_MSIZE_WORD | STM32_DMA_CR_MINC | STM32_DMA_CR_CIRC | STM32_DMA_CR_PL(3));
+ // M2P: Memory 2 Periph; PL: Priority Level
+
+ // Start DMA
+ dmaStreamEnable(WS2812_DMA_STREAM);
+
+ // Configure PWM
+ // NOTE: It's required that preload be enabled on the timer channel CCR register. This is currently enabled in the
+ // ChibiOS driver code, so we don't have to do anything special to the timer. If we did, we'd have to start the timer,
+ // disable counting, enable the channel, and then make whatever configuration changes we need.
+ pwmStart(&WS2812_PWM_DRIVER, &ws2812_pwm_config);
+ pwmEnableChannel(&WS2812_PWM_DRIVER, WS2812_PWM_CHANNEL - 1, 0); // Initial period is 0; output will be low until first duty cycle is DMA'd in
+}
+
+void ws2812_write_led(uint16_t led_number, uint8_t r, uint8_t g, uint8_t b) {
+ // Write color to frame buffer
+ for (uint8_t bit = 0; bit < 8; bit++) {
+ ws2812_frame_buffer[WS2812_RED_BIT(led_number, bit)] = ((r >> bit) & 0x01) ? WS2812_DUTYCYCLE_1 : WS2812_DUTYCYCLE_0;
+ ws2812_frame_buffer[WS2812_GREEN_BIT(led_number, bit)] = ((g >> bit) & 0x01) ? WS2812_DUTYCYCLE_1 : WS2812_DUTYCYCLE_0;
+ ws2812_frame_buffer[WS2812_BLUE_BIT(led_number, bit)] = ((b >> bit) & 0x01) ? WS2812_DUTYCYCLE_1 : WS2812_DUTYCYCLE_0;
+ }
+}
+
+// Setleds for standard RGB
+void ws2812_setleds(LED_TYPE* ledarray, uint16_t leds) {
+ static bool s_init = false;
+ if (!s_init) {
+ ws2812_init();
+ s_init = true;
+ }
+
+ for (uint16_t i = 0; i < leds; i++) {
+ ws2812_write_led(i, ledarray[i].r, ledarray[i].g, ledarray[i].b);
+ }
+}
diff --git a/drivers/chibios/ws2812_spi.c b/drivers/chibios/ws2812_spi.c
new file mode 100644
index 0000000000..36e08e39ed
--- /dev/null
+++ b/drivers/chibios/ws2812_spi.c
@@ -0,0 +1,90 @@
+#include "quantum.h"
+#include "ws2812.h"
+
+/* Adapted from https://github.com/gamazeps/ws2812b-chibios-SPIDMA/ */
+
+#ifdef RGBW
+# error "RGBW not supported"
+#endif
+
+// Define the spi your LEDs are plugged to here
+#ifndef WS2812_SPI
+# define WS2812_SPI SPID1
+#endif
+
+#ifndef WS2812_SPI_MOSI_PAL_MODE
+# define WS2812_SPI_MOSI_PAL_MODE 5
+#endif
+
+#define BYTES_FOR_LED_BYTE 4
+#define NB_COLORS 3
+#define BYTES_FOR_LED (BYTES_FOR_LED_BYTE * NB_COLORS)
+#define DATA_SIZE (BYTES_FOR_LED * RGBLED_NUM)
+#define RESET_SIZE 200
+#define PREAMBLE_SIZE 4
+
+static uint8_t txbuf[PREAMBLE_SIZE + DATA_SIZE + RESET_SIZE] = {0};
+
+/*
+ * As the trick here is to use the SPI to send a huge pattern of 0 and 1 to
+ * the ws2812b protocol, we use this helper function to translate bytes into
+ * 0s and 1s for the LED (with the appropriate timing).
+ */
+static uint8_t get_protocol_eq(uint8_t data, int pos) {
+ uint8_t eq = 0;
+ if (data & (1 << (2 * (3 - pos))))
+ eq = 0b1110;
+ else
+ eq = 0b1000;
+ if (data & (2 << (2 * (3 - pos))))
+ eq += 0b11100000;
+ else
+ eq += 0b10000000;
+ return eq;
+}
+
+static void set_led_color_rgb(LED_TYPE color, int pos) {
+ uint8_t* tx_start = &txbuf[PREAMBLE_SIZE];
+
+ for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + j] = get_protocol_eq(color.g, j);
+ for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE + j] = get_protocol_eq(color.r, j);
+ for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE * 2 + j] = get_protocol_eq(color.b, j);
+}
+
+void ws2812_init(void) {
+#if defined(USE_GPIOV1)
+ palSetLineMode(RGB_DI_PIN, PAL_MODE_STM32_ALTERNATE_PUSHPULL);
+#else
+ palSetLineMode(RGB_DI_PIN, PAL_MODE_ALTERNATE(WS2812_SPI_MOSI_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL);
+#endif
+
+ // TODO: more dynamic baudrate
+ static const SPIConfig spicfg = {
+ 0, NULL, PAL_PORT(RGB_DI_PIN), PAL_PAD(RGB_DI_PIN),
+ SPI_CR1_BR_1 | SPI_CR1_BR_0 // baudrate : fpclk / 8 => 1tick is 0.32us (2.25 MHz)
+ };
+
+ spiAcquireBus(&WS2812_SPI); /* Acquire ownership of the bus. */
+ spiStart(&WS2812_SPI, &spicfg); /* Setup transfer parameters. */
+ spiSelect(&WS2812_SPI); /* Slave Select assertion. */
+}
+
+void ws2812_setleds(LED_TYPE* ledarray, uint16_t leds) {
+ static bool s_init = false;
+ if (!s_init) {
+ ws2812_init();
+ s_init = true;
+ }
+
+ for (uint8_t i = 0; i < leds; i++) {
+ set_led_color_rgb(ledarray[i], i);
+ }
+
+ // Send async - each led takes ~0.03ms, 50 leds ~1.5ms, animations flushing faster than send will cause issues.
+ // Instead spiSend can be used to send synchronously (or the thread logic can be added back).
+#ifdef WS2812_SPI_SYNC
+ spiSend(&WS2812_SPI, sizeof(txbuf) / sizeof(txbuf[0]), txbuf);
+#else
+ spiStartSend(&WS2812_SPI, sizeof(txbuf) / sizeof(txbuf[0]), txbuf);
+#endif
+}
generated by cgit v1.2.1 (git 2.18.0) at 2024-11-10 07:25:57 +0000