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-rw-r--r--platforms/chibios/drivers/i2c_master.c59
-rw-r--r--platforms/chibios/drivers/i2c_master.h61
-rw-r--r--platforms/chibios/drivers/serial.c19
-rw-r--r--platforms/chibios/drivers/serial_usart.c32
4 files changed, 76 insertions, 95 deletions
diff --git a/platforms/chibios/drivers/i2c_master.c b/platforms/chibios/drivers/i2c_master.c
index 43591d56f8..4a5d4760d0 100644
--- a/platforms/chibios/drivers/i2c_master.c
+++ b/platforms/chibios/drivers/i2c_master.c
@@ -27,8 +27,67 @@
#include "quantum.h"
#include "i2c_master.h"
#include <string.h>
+#include <ch.h>
#include <hal.h>
+#ifndef I2C1_SCL_PIN
+# define I2C1_SCL_PIN B6
+#endif
+#ifndef I2C1_SDA_PIN
+# define I2C1_SDA_PIN B7
+#endif
+
+#ifdef USE_I2CV1
+# ifndef I2C1_OPMODE
+# define I2C1_OPMODE OPMODE_I2C
+# endif
+# ifndef I2C1_CLOCK_SPEED
+# define I2C1_CLOCK_SPEED 100000 /* 400000 */
+# endif
+# ifndef I2C1_DUTY_CYCLE
+# define I2C1_DUTY_CYCLE STD_DUTY_CYCLE /* FAST_DUTY_CYCLE_2 */
+# endif
+#else
+// The default timing values below configures the I2C clock to 400khz assuming a 72Mhz clock
+// For more info : https://www.st.com/en/embedded-software/stsw-stm32126.html
+# ifndef I2C1_TIMINGR_PRESC
+# define I2C1_TIMINGR_PRESC 0U
+# endif
+# ifndef I2C1_TIMINGR_SCLDEL
+# define I2C1_TIMINGR_SCLDEL 7U
+# endif
+# ifndef I2C1_TIMINGR_SDADEL
+# define I2C1_TIMINGR_SDADEL 0U
+# endif
+# ifndef I2C1_TIMINGR_SCLH
+# define I2C1_TIMINGR_SCLH 38U
+# endif
+# ifndef I2C1_TIMINGR_SCLL
+# define I2C1_TIMINGR_SCLL 129U
+# endif
+#endif
+
+#ifndef I2C_DRIVER
+# define I2C_DRIVER I2CD1
+#endif
+
+#ifdef USE_GPIOV1
+# ifndef I2C1_SCL_PAL_MODE
+# define I2C1_SCL_PAL_MODE PAL_MODE_ALTERNATE_OPENDRAIN
+# endif
+# ifndef I2C1_SDA_PAL_MODE
+# define I2C1_SDA_PAL_MODE PAL_MODE_ALTERNATE_OPENDRAIN
+# endif
+#else
+// The default PAL alternate modes are used to signal that the pins are used for I2C
+# ifndef I2C1_SCL_PAL_MODE
+# define I2C1_SCL_PAL_MODE 4
+# endif
+# ifndef I2C1_SDA_PAL_MODE
+# define I2C1_SDA_PAL_MODE 4
+# endif
+#endif
+
static uint8_t i2c_address;
static const I2CConfig i2cconfig = {
diff --git a/platforms/chibios/drivers/i2c_master.h b/platforms/chibios/drivers/i2c_master.h
index 5f082e9d1e..deee7ecc08 100644
--- a/platforms/chibios/drivers/i2c_master.h
+++ b/platforms/chibios/drivers/i2c_master.h
@@ -24,66 +24,7 @@
*/
#pragma once
-#include <ch.h>
-#include <hal.h>
-
-#ifndef I2C1_SCL_PIN
-# define I2C1_SCL_PIN B6
-#endif
-#ifndef I2C1_SDA_PIN
-# define I2C1_SDA_PIN B7
-#endif
-
-#ifdef USE_I2CV1
-# ifndef I2C1_OPMODE
-# define I2C1_OPMODE OPMODE_I2C
-# endif
-# ifndef I2C1_CLOCK_SPEED
-# define I2C1_CLOCK_SPEED 100000 /* 400000 */
-# endif
-# ifndef I2C1_DUTY_CYCLE
-# define I2C1_DUTY_CYCLE STD_DUTY_CYCLE /* FAST_DUTY_CYCLE_2 */
-# endif
-#else
-// The default timing values below configures the I2C clock to 400khz assuming a 72Mhz clock
-// For more info : https://www.st.com/en/embedded-software/stsw-stm32126.html
-# ifndef I2C1_TIMINGR_PRESC
-# define I2C1_TIMINGR_PRESC 0U
-# endif
-# ifndef I2C1_TIMINGR_SCLDEL
-# define I2C1_TIMINGR_SCLDEL 7U
-# endif
-# ifndef I2C1_TIMINGR_SDADEL
-# define I2C1_TIMINGR_SDADEL 0U
-# endif
-# ifndef I2C1_TIMINGR_SCLH
-# define I2C1_TIMINGR_SCLH 38U
-# endif
-# ifndef I2C1_TIMINGR_SCLL
-# define I2C1_TIMINGR_SCLL 129U
-# endif
-#endif
-
-#ifndef I2C_DRIVER
-# define I2C_DRIVER I2CD1
-#endif
-
-#ifdef USE_GPIOV1
-# ifndef I2C1_SCL_PAL_MODE
-# define I2C1_SCL_PAL_MODE PAL_MODE_ALTERNATE_OPENDRAIN
-# endif
-# ifndef I2C1_SDA_PAL_MODE
-# define I2C1_SDA_PAL_MODE PAL_MODE_ALTERNATE_OPENDRAIN
-# endif
-#else
-// The default PAL alternate modes are used to signal that the pins are used for I2C
-# ifndef I2C1_SCL_PAL_MODE
-# define I2C1_SCL_PAL_MODE 4
-# endif
-# ifndef I2C1_SDA_PAL_MODE
-# define I2C1_SDA_PAL_MODE 4
-# endif
-#endif
+#include <stdint.h>
typedef int16_t i2c_status_t;
diff --git a/platforms/chibios/drivers/serial.c b/platforms/chibios/drivers/serial.c
index ef6f0aa8d5..17d0b32be8 100644
--- a/platforms/chibios/drivers/serial.c
+++ b/platforms/chibios/drivers/serial.c
@@ -179,8 +179,6 @@ void interrupt_handler(void *arg) {
// wait for the sync to finish sending
serial_delay();
- *trans->status = (checksum_computed == checksum_received) ? TRANSACTION_ACCEPTED : TRANSACTION_DATA_ERROR;
-
// end transaction
serial_input();
@@ -193,17 +191,12 @@ void interrupt_handler(void *arg) {
/////////
// start transaction by initiator
//
-// int soft_serial_transaction(int sstd_index)
+// bool soft_serial_transaction(int sstd_index)
//
-// Returns:
-// TRANSACTION_END
-// TRANSACTION_NO_RESPONSE
-// TRANSACTION_DATA_ERROR
// this code is very time dependent, so we need to disable interrupts
-int soft_serial_transaction(int sstd_index) {
- if (sstd_index > NUM_TOTAL_TRANSACTIONS) return TRANSACTION_TYPE_ERROR;
+bool soft_serial_transaction(int sstd_index) {
+ if (sstd_index > NUM_TOTAL_TRANSACTIONS) return false;
split_transaction_desc_t *trans = &split_transaction_table[sstd_index];
- if (!trans->status) return TRANSACTION_TYPE_ERROR; // not registered
// TODO: remove extra delay between transactions
serial_delay();
@@ -226,7 +219,7 @@ int soft_serial_transaction(int sstd_index) {
// slave failed to pull the line low, assume not present
dprintf("serial::NO_RESPONSE\n");
chSysUnlock();
- return TRANSACTION_NO_RESPONSE;
+ return false;
}
// if the slave is present syncronize with it
@@ -266,7 +259,7 @@ int soft_serial_transaction(int sstd_index) {
serial_high();
chSysUnlock();
- return TRANSACTION_DATA_ERROR;
+ return false;
}
// always, release the line when not in use
@@ -274,5 +267,5 @@ int soft_serial_transaction(int sstd_index) {
serial_output();
chSysUnlock();
- return TRANSACTION_END;
+ return true;
}
diff --git a/platforms/chibios/drivers/serial_usart.c b/platforms/chibios/drivers/serial_usart.c
index 124e4be685..42c476a374 100644
--- a/platforms/chibios/drivers/serial_usart.c
+++ b/platforms/chibios/drivers/serial_usart.c
@@ -36,7 +36,7 @@ static SerialDriver* serial_driver = &SERIAL_USART_DRIVER;
static inline bool react_to_transactions(void);
static inline bool __attribute__((nonnull)) receive(uint8_t* destination, const size_t size);
static inline bool __attribute__((nonnull)) send(const uint8_t* source, const size_t size);
-static inline int initiate_transaction(uint8_t sstd_index);
+static inline bool initiate_transaction(uint8_t sstd_index);
static inline void usart_clear(void);
/**
@@ -206,14 +206,12 @@ static inline bool react_to_transactions(void) {
to signal that the slave is ready to receive possible transaction buffers */
sstd_index ^= HANDSHAKE_MAGIC;
if (!send(&sstd_index, sizeof(sstd_index))) {
- *trans->status = TRANSACTION_DATA_ERROR;
return false;
}
/* Receive transaction buffer from the master. If this transaction requires it.*/
if (trans->initiator2target_buffer_size) {
if (!receive(split_trans_initiator2target_buffer(trans), trans->initiator2target_buffer_size)) {
- *trans->status = TRANSACTION_DATA_ERROR;
return false;
}
}
@@ -226,12 +224,10 @@ static inline bool react_to_transactions(void) {
/* Send transaction buffer to the master. If this transaction requires it. */
if (trans->target2initiator_buffer_size) {
if (!send(split_trans_target2initiator_buffer(trans), trans->target2initiator_buffer_size)) {
- *trans->status = TRANSACTION_DATA_ERROR;
return false;
}
}
- *trans->status = TRANSACTION_ACCEPTED;
return true;
}
@@ -252,11 +248,9 @@ void soft_serial_initiator_init(void) {
* @brief Start transaction from the master half to the slave half.
*
* @param index Transaction Table index of the transaction to start.
- * @return int TRANSACTION_NO_RESPONSE in case of Timeout.
- * TRANSACTION_TYPE_ERROR in case of invalid transaction index.
- * TRANSACTION_END in case of success.
+ * @return bool Indicates success of transaction.
*/
-int soft_serial_transaction(int index) {
+bool soft_serial_transaction(int index) {
/* Clear the receive queue, to start with a clean slate.
* Parts of failed transactions or spurious bytes could still be in it. */
usart_clear();
@@ -266,25 +260,19 @@ int soft_serial_transaction(int index) {
/**
* @brief Initiate transaction to slave half.
*/
-static inline int initiate_transaction(uint8_t sstd_index) {
+static inline bool initiate_transaction(uint8_t sstd_index) {
/* Sanity check that we are actually starting a valid transaction. */
if (sstd_index >= NUM_TOTAL_TRANSACTIONS) {
dprintln("USART: Illegal transaction Id.");
- return TRANSACTION_TYPE_ERROR;
+ return false;
}
split_transaction_desc_t* trans = &split_transaction_table[sstd_index];
- /* Transaction is not registered. Abort. */
- if (!trans->status) {
- dprintln("USART: Transaction not registered.");
- return TRANSACTION_TYPE_ERROR;
- }
-
/* Send transaction table index to the slave, which doubles as basic handshake token. */
if (!send(&sstd_index, sizeof(sstd_index))) {
dprintln("USART: Send Handshake failed.");
- return TRANSACTION_TYPE_ERROR;
+ return false;
}
uint8_t sstd_index_shake = 0xFF;
@@ -295,14 +283,14 @@ static inline int initiate_transaction(uint8_t sstd_index) {
*/
if (!receive(&sstd_index_shake, sizeof(sstd_index_shake)) || (sstd_index_shake != (sstd_index ^ HANDSHAKE_MAGIC))) {
dprintln("USART: Handshake failed.");
- return TRANSACTION_NO_RESPONSE;
+ return false;
}
/* Send transaction buffer to the slave. If this transaction requires it. */
if (trans->initiator2target_buffer_size) {
if (!send(split_trans_initiator2target_buffer(trans), trans->initiator2target_buffer_size)) {
dprintln("USART: Send failed.");
- return TRANSACTION_NO_RESPONSE;
+ return false;
}
}
@@ -310,9 +298,9 @@ static inline int initiate_transaction(uint8_t sstd_index) {
if (trans->target2initiator_buffer_size) {
if (!receive(split_trans_target2initiator_buffer(trans), trans->target2initiator_buffer_size)) {
dprintln("USART: Receive failed.");
- return TRANSACTION_NO_RESPONSE;
+ return false;
}
}
- return TRANSACTION_END;
+ return true;
}
generated by cgit v1.2.1 (git 2.18.0) at 2024-11-02 13:24:55 +0000